The present invention relates to a transistor amplifier for ultra high frequency operation and more particularly to an amplifier for pulse operation. In this case and principally when the transistor is a high power transistor, the time required for establishing the current is not inconsiderable and in some applications, relative to radar, lengthening of the rise time of the output pulses of the amplifier causes errors in the distance measurements, in particular.
A state of the art of a transistor amplifier for high frequency operation may be formed by U.S. Pat. No. 3,919,656 filed on Apr. 23, 1973.
FIG. 1 of the present application represents a high frequency transistor amplifier similar to the one in the cited American patent, differing only in that the transistor T is connected with base to ground and not with common emitter. It operates in class B, i.e. without biassing voltage. Its emitter E is connected to the input of device I by means of an assembly L1 C1, inductance, capacitance and a socalled input inductance Le is placed in parallel across the base of transistor T. The collector of the transistor is connected to the output of the device by means of an assembly L2 C2. The power supply comes from a source VCC which applies a current Ic to the collector of the transistor through an inductance Lc after being enabled by the input pulse. A chemical capacitor C4 of high value serves as an energy reservoir when the current Ic is called for. The capacitor C3 is a decoupling capacitor for the high frequency.
Used with pulses, such a circuit has drawbacks under transitory operating conditions. In this case, in fact, the sudden conduction of the enabled transistor through appearance of the input pulse causes a high current drain through the inductance L1 connected between the input of the amplifier and the emitter of transistor T. The supply current then varies according to an exponential law whose time constant is proportional to the inductance components Lc and Le included in the circuit for supplying the transistor T with DC current. FIG. 2 shows the evolution of the supply current Ic as a function of the voltage VCE between collector and emitter. FIG. 3 shows the evolution of the high frequency voltage outputted as a function of time from the time when the input pulse is applied. It can be seen that the voltage applied to the collector increases progressively with an asymptote formed by the value of the VCC supply source and that the envelope of the high frequency voltage pulses has an exponential shape, in other words that the rising fronts are delayed. The ideal would be that the VCC voltage is reached in a minimum of time.
To remedy this drawback, attempts have been made to reduce the inductances Le and Lc, but limits are placed on this action by the input and output impedances of the transistor which impose a value below which the inductances Le and Lc cannot be lowered without short-circuiting the high frequency signals. Now, the effect of these inductances Le and Lc proves to be all the more pronounced the higher the value of the HF current peaks, which is the case for power transistors. It is thus apparent that the time for establishing the current in a power transistor cannot be reduced sufficiently when the inductances Le and Lc are reduced.
Another phenomenon related to the preceding one is due to the time required for causing conduction of the transistor for which the appearance of the nominal output power can only begin when the collector current has reached its average value i.e. EQU Ic=VCC/Rc,
VCC being the supply voltage and Rc the load resistance.
By studying the S parameters of the transistor which will be recalled below, the limits of its operation can be understood:
the parameter S11 represents the input coefficient of the amplifier, parameter S22 represents the reflection coefficient at the output,
parameters S21 and S12 represent the transmission coefficients, respectively in the input to output direction and output to input direction; parameter S21 is the gain of the transistor in the usual meaning of the term.
FIGS. 4a to 4d show a graphic representation of these different coefficients. It can be seen, by examining curve S11=f(t), FIG. 4a, that the reflected energy remains high during the first 50 nanoseconds, i.e. that the transistor is only enabled after a certain lapse of time. The energy transmitted remains low and the gain is less than unity, FIG. 4c. Matching and the transmitted power become correct after about 200 ns.
FIG. 5a, which shows the transmitted power as a function of time, shows (curve 1) that the power is applied at the input well before the output power appears (curve 0), time .DELTA.t being the enabling time of the transistor. FIG. 5b shows the form of the input pulse (curve I), the transistor absorbs current before the output power appears (curve II).
As was mentioned above, the principal cause of the observed disadvantages resides in the inductance parts of the supply circuit which can never be quite cancelled out. Attempts have been made to partly reduce this defect by placing a chemical capacitor C4 of high value in parallel across the supply just before the collector inductance Lc. This capacitor is referenced C4 in FIG. 1 and effectively it masks the inductive and resistive components situated upstream, i.e. on the supply side, but since it is of high value it also ensures the supply of energy for the transistor during the periods of high current flow providing, however, that its internal impedance is negligible, which is difficult to achieve in practice.